Linus Maurer was born in Steyr, Austria, in 1972. He received the Dipl.-Ing. Degree in Physics and his Dr. techn. Degree from the Johannes Kepler University Linz, Austria, in 1997 and 2001, respectively. Dr Maurer started his PhD in 1998 at the Siemens Semiconductor Division, Munich. From 1999 to 2001 he was research engineer at the Institute for Communications and Information Engineering of the Johannes Kepler University Linz. During this time Dr Maurer was engaged in the development of a highly integrated zero-IF based UMTS compliant RF receiver in cooperation with Infineon Technologies Munich. In 2002 Dr. Maurer joined DICE, an Infineon Technologies design center dedicated to the development of cellular RF transceivers and ICs for automotive Radar applications. Dr. Maurer was responsible for the innovation projects of the cellular division of DICE including all externally co-funded projects from 2004 to 2006. In this position he was engaged in several EC co-funded projects like LEMON, GAWAIN, E2R and E2R-II. He is currently site manager for the Sense & Control division of DICE overlooking the Automotive Radar and Wireless Control development activities. He is recipient of the ITG-award 2002 and the EEEfCOM award 2002 for his work on the system design of UMTS compliant RF-transceivers and co-recipient of the EEEfCOM award 2006 for his contributions to the development of all digital phase-locked loops targeted at RF-applications. In 2007 he has been appointed IEEE Distinguished Microwave Lecturer. His main research interests are focused on the simulation of wireless communication and Radar systems with special emphasis on RF related signal impairments, RF transceivers in deep submicron CMOS technologies, frequency agile RF architectures, mixed signal technology and digital front-end enhanced RF transceivers. He has authored and co-authored over 100 publications in these fields and has given numerous international presentations and tutorials.
Abstract
State-of-the-art RF transceivers are mainly optimized for a single radio access technology and do rarely employ digital signal processing capabilities on the RFIC. Digital functions are commonly focused on control interfaces (e.g. for PLL programming) and calibration functionality (e.g. for analog filter tuning). Since analog blocks are not well suited for reconfiguration by the nature of their implementation such transceivers will not be able to effectively tackle upcoming challenges in terms of flexibility arising with the need of multi-system/multimode/multi-band operation.The lecture will focus on the practical realization of an advancement of the wellknown direct conversion receiver and transmitter architectures: digital signal processing functions are incorporated directly onto the RFIC to increase its flexibility. The digital front-end (DFE) closes the gap between traditional base-band processing done at the MODEM-IC and the high data rates at the output of the analog to digital converter (ADC). The proposed DFE implementation realizes traditionally analog functions (e.g. channel selection filtering, DC-offset compensation, etc.) by providing highly configurable filter blocks, which are adapted to the respective standard requirements. Furthermore, the DFE can be used to efficiently optimize the overall signal path, e.g. by correcting analog imperfections in the digital domain. Consequently, the traditionally analog data interface between RFIC and MODEM-IC is replaced by a digital one. With the advent of RF-CMOS the implementation of the DFE locally on the RFIC has become technically feasible and also economically reasonable. Furthermore, Realizing digital signal processing functionality on the RFIC in an advanced CMOS technology for mass market applications has advantages over “pure analog” RFICs in terms of production stability, power consumption and cost.